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Designing multi motor controls with high performance and maintained modularity

This is an excerpt of the SPS/IPC/Drives 2011 forum presentation given by Jonas Hemming, CTO at Unjo. The purpose of the presentation was to explain how correctly designed modular FPGA based multi motor controls can produce flexible and customized control systems with a very short development time compared to using modern Digital Signal Processor (DSP) technology.

“Unjo’s ambition is to be one of the very best at creating efficient field-programmable gate array applications using a methodology that creates a true parallel FPGA with high performance and energy efficiency with maintained modularity”, says Jonas Hemming, CTO at Unjo.

 

What is needed to design a customized drive system?

To effectively design a customized drive system, where the demands on short development times are high, a high degree of modularity and flexibility is required. There may be different types of motors and commutation methods or different controllers, but also, for example, different types of sensors. You often end up with a compromise between, on one hand modularity and flexibility, and on the other hand precision- and speed performance. However, to maintain a high performance and efficiency, both are required. This will further come to a head if the aim is to run many motors, when we also require independence between controllers for each motor, except when coordination between the motors is required. This flexibility puts even greater demands on the control system.

Sequential Modern Digital Signal Processor

An essential problem in CPU-based real-time systems is created by the fact that all execution occurs sequentially. The image is an illustration of the core processes in a motor controller. The blocks appear to be executed in parallel. But when the process is studied in more detail, you can tell there is only one block executing at a time. To manage all the processes in correct chronological order and often enough, some form of scheduling has to be arranged. The illustration shows how it might look if the system is interrupt-driven. Other methods have similar problems. This is because all these processes share a mutually exclusive resource – TIME!

The time constraint involves several challenges, but the most important are: first of all, the need for resources and the complexity increases dramatically when controlling multiple motors, and second of all, any change in vital parts of the software design requires a comprehensive and complex verification process, depending precisely on the common division of time. These conditions are in direct conflict with the need for rapid design of customized, high-performance multi-motor systems.

So, what can we do? Well, we can provide the processor with supporting hardware – peripherals – so that the execution can be moved away from sequential processing to the parallelism of the hardware. This obviously helps, but large parts of the process are still left in the sequential world. Additionally, the peripheral devices can easily become a limiting factor because they are in general relatively inflexible.

Semi Parallel Field-Programmable Gate Array

If the system is constructed into a FPGA (programmable logic) the problem of inflexible peripheral devices will be eliminated, because they can then be modified as needed. However, the problem of sequential software remains, and one can also argue that a central processing unit implemented inside an FPGA, at least if it is made of programmable logic, is neither a cost effective nor a resource effective solution.

True Parallel Field-Programmable Gate Array

The full potential of the FPGA is not obvious until much larger parts of the core of the control functions are implemented directly in a programmable logic circuit. The purpose of this is to move more or less all handling of time-critical processes below the millisecond level to the true parallel world, here symbolized by the control block outside the embedded processor. In this way, all the sequential handling of time-critical processes is eliminated. The processor still has its given place for the handling of control flows, which are typically slower and more sequential in nature, or other “housekeeping”.

If several control blocks are instantiated, multiple motors can be controlled without the CPU being overloaded. It lives a rather comfortable life where it only controls and monitors the control blocks that make all the hard work. Important to note is that the control blocks don’t need to be equal. They may differ in performance and complexity, or manage different types of motors. The limits are more likely to be set by the design of the surrounding hardware.

Also note that because there is almost no accidental interaction between the blocks, the verification process when adding and removing readymade control blocks is marginal, compared to the corresponding done in the CPU environment. Modules of a completely different kind can also be attached to the design, for example there are several companies that deliver functional blocks (IP blocks) that implement all common fieldbus systems, i.e. real-time Ethernet.

Conclusions

What we now have achieved is a system and a method that provides good modularity and offers very high performance. This involves very good isolation between the functional blocks and true parallelism, which makes the system particularly well suited for multi-motor drives. The minimized need for verification is also a huge advantage when the functionality of the construction needs to change quickly and often.

Unjo Gepard- an FPGA-based motor controller

Unjo’s Gepard-platform is a design intended to show what FPGA technology can achieve when it comes to control context. Gepard has twelve phase outputs of which each can handle just above ten ampere. Each phase has its own current measurement and the phases can be combined to drive many types of motors: DC, Stepper, BLDC, PMSM, SRM, asynchronous, etc. The motor types can also be mixed. Gepard is used by Unjo as a demonstration platform for the construction of functional models or prototypes, but also as a controller in series-produced products.

 

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